Principal Reliability Engineer

The SST Product Innovation Team in the Office of the CTO defines, prototypes, and scales Enphase's next-generation power systems. Solid-state transformers operate under extreme stress - MV switching at high frequency, wide ambient swings, thousands of thermal cycles per year, and 20+ year field life. We need a Reliability Lead who can translate real-world workload and environmental stress into quantitative test plans that expose failure modes before they reach the field.

You will own reliability from architecture through production - mission profiles, physics-of-failure models, accelerated life tests, and data-driven design changes. Hands-on with hardware, embedded in the design team, accountable for product lifetime.

What You Will Do

• Define and own the SST mission profile: Translate deployment conditions (load profiles, duty cycles, ambient temperatures, humidity, on/off cycling, grid transients) into a quantitative mission profile that drives all reliability testing. Update as field data becomes available.
• Design workload-based accelerated life tests (ALT): Build test plans using physics-of-failure models (Arrhenius, Coffin-Manson, Norris-Landzberg, inverse power law). Define acceleration factors, sample sizes, durations, and pass/fail criteria per failure mode.
• Lead thermal and power cycling testing: Execute thermal cycling (-40°C to +85°C+), power cycling, and active thermal cycling on power modules, solder joints, wire bonds, and DBC substrates. Correlate to field lifetime via mission-profile acceleration.
• Drive DFMEA/PFMEA: Lead cross-functional FMEA sessions tied to real test data. Track RPNs and drive corrective actions to closure.
• Own HALT/HASS strategy: Run HALT during design to find margins and failure modes. Develop HASS profiles for production screening.
• Build physics-of-failure models: Develop reliability models for SiC modules (bond wire, solder, die-attach), capacitors, magnetics, gate driver isolation, and connectors.
• Write reliability test specs: Specs tied to mission profile, not generic IEC/UL conditions. Define stress conditions, load profiles, sample sizes (Weibull-based), readout intervals, and failure criteria.
• Integrate reliability into design: Participate in design reviews from concept through production. Flag high-risk areas early and drive design changes before they get expensive.
• Champion DfR: Train engineers on mission-profile thinking, derating, thermal margins, and power electronics failure mechanisms.
• Collaborate across disciplines: Work with PE, thermal, mechanical, FW, and manufacturing teams. Partner with suppliers on component qualification.

Who You Are and What You Bring

• BS, MS, or PhD in Mechanical Engineering, Electrical Engineering, Materials Science, Reliability Engineering, or closely related field
• Principal Engineer: BS + 15 yrs | MS + 12 yrs | PhD + 8 yrs
• Candidates with greater experience are strongly encouraged to apply
• Mission profile development - required: Experience translating real-world use conditions (load profiles, duty cycles, environmental exposure, on/off cycling, grid transients) into quantitative mission profiles. Must understand calendar vs. operational aging and how workload severity affects lifetime.
• Physics-of-failure modeling - required: Ability to build models using Arrhenius, Coffin-Manson, Norris-Landzberg, and inverse power law. Must derive acceleration factors from first principles.
• ALT design - required: Hands-on experience designing workload-based accelerated life tests. Defining acceleration factors, Weibull-based sample sizes, test-to-field correlation, and pass/fail criteria tied to B10 or MTTF targets.
• Thermal and power cycling testing - required: Direct experience with thermal shock, thermal cycling, and power cycling on power modules, solder joints, and PCBs. Understanding of ΔTj effects and dwell time sensitivity.
• DFMEA/PFMEA leadership - required: Leading cross-functional FMEA sessions with severity/occurrence/detection ratings grounded in real data.
• Weibull and life data analysis - required: Proficiency with Weibull++, JMP, Minitab, or Python/R. Fitting Weibull, lognormal, and competing-risk models to censored data. Bayesian updating and degradation modeling.
• Failure analysis: Root cause using cross-sectioning, SEM/EDS, X-ray, acoustic microscopy, dye-and-pry, curve tracing, and thermal imaging.
• Power electronics domain knowledge: SiC/IGBT module failure mechanisms (bond wire, solder, die-attach, gate oxide), capacitor wear-out, magnetic aging, connector reliability.
• Component derating and qualification: Defining derating guidelines and critically reviewing vendor data (HTOL, TC, HTRB, H3TRB, IOL) against actual mission profile.
• HALT/HASS: Running HALT to find design limits, developing HASS profiles for production screening.
• DOE - required: Applying DOE methods (factorial, fractional factorial, response surface, Taguchi) to identify dominant stress factors and optimize product robustness.
• Communication: Presenting reliability assessments and risk trade-offs to leadership. Defending positions in design reviews.
• Self-driven ownership in a fast-paced environment where products are new and standards are evolving.

Why This Role?

At Enphase, reliability is not a gate you pass - it is a discipline you practice every day. The SST pushes the limits of power density, switching frequency, and voltage class with a 20+ year field life target. You will work on problems that matter, with hardware in your hands, alongside engineers who care deeply about getting it right.

Work Location

Austin, TX | Office of the CTO - SST Product Innovation Team

The base pay range for this position is $130,000 to $183,000 per year. This salary range may be modified in the future. The successful candidate's starting pay will be determined based on job-related skills, experience, education or training, work location, and market conditions. This position is also eligible for bonus, equity, and benefits.